VHDL Part 49 : Re Mask Generator, Third Solution

Apparently, I am not the only one that has this problem. I had found a way to solve the mask generator problem by looking in forums such as the one posted in VelocityReviews titled VHDL - generic shift register where value 'n' keeps changing. Though our circuits are different, we both struggled with mapping the generics based on an input signal. The generics have to be compiled during runtime that's why I have errors as posted on the previous post (VHDL Part 48).  What Ralph Hildebrandt suggested in that post was to model a shift register (whatever component it is) wide enough for the worst case. He also noted that all the time, those flipflops is included. It was sound enough. That is what I followed. Whatever component I/O ports you put in the FPGA board has to be fixed for obvious reasons.