Tuesday, September 2, 2008

VHDl Part 32 : Finite State Machines (FSM)

I'm back..I have been very busy these past few days coding a block that would interface a dual-port block, a software control and sdram controller. So I got lost in circulation :).

The first time I encountered FSM was when it was taught in the class. It hadn't appealed to me much since it was only a one day discussion and more on theories. We didn't actually code it. When a training in the basics of Xilinx ISE was held in our office this year, it caught my interest. I just realized how useful state machines are and so I decided to blog about it. The only book that got me going in using FSM is the one by Pedroni, V., Circuit Design with VHDL. Here's some points I got from that book.

In constructing a single FSM you need two process, one combinational and one sequential.

That's it! heheh.. Well, there are some primers the author gave like the Moore-Mealy machines. It's much better discussed by him so you just check out his book.

To better understand FSM I need to study the design samples in the book and then try to come up with my own. And that's what I will blog next!

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